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Senior DFT Engineer

    Published on: 16 May 2023

    Vacancy: 1

    Employment Status: Full-time

    Salary: Negotiable


Job Location

Coimbatore, Tamilnadu, India


3-5 years


Bachelor's or Master's degree in Electronics or similar.

Skills Required

    Fundamentals of SCAN stuck-at and at-speed techniques.

    Expertise in handling Mentor Graphics EDT logic.

    Pattern generation with Mentor Graphics TestKompress Tool.

    Good knowledge in BSCAN operations. Knowledge in MBIST Operations.

    Expertise in handling Synopsys SMS tool sets (Integrator, Builder, Yield Accelerator).

    Excellent track of pattern simulation and coverage analysis (preferred cadence ncsim simulator expert Experience in ATPG, Scan, BIST and Mentor TestKompress.

    Expert in writing test benches (Verilog, system Verilog) and tests for different components like PLL, ADC etc for generating ATE vectors.

    Familiarity with scan, JTAG concepts and 3rd party tools.

    Tester program creation, debug, and validation of DFT features on ATE

    Excellent problem-solving and troubleshooting skills.

    Strong written, verbal, and telephonic communication skills.

    Excellent research and interpersonal skills.

    Strong analytical skills.



Salary :

As per the industrial norms

Company will offer attractive salary if you can show your skill, creativity and capability.

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