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Roles and Responsibilities :
Expertise in PD flow from netlist to GDSII. (Floorplanning, Power planning, Placement & Optimization, CTS, Routing, Timing/SI and ECO steps)
Good knowledge in OCV/ MM/MC and multi power designs. (Level shifters, Isolation cells, etc..)
Expertise in XTalk/SI/EM
Strong knowledge on CTS constraints and skew fixing
Good understanding of library preparation in any environment (Synopsys/Cadence)
Knowledge of DRC/LVS, IR drop, formal verification and synthesis an added advantage
Exposure in low power designs with CPF/UPF flow
Familiarity in tape-out on lower technology nodes and multiple foundries
Experience in 5nm, 7nm and 16nm technologies
- Experience Requirements :
-3 - 7 Years of experience in Physical Design Engineer
Qualifications:
- Bachelor's degree or Master’s degree in Electronics or similar
Job Location
Coimbatore, Tamilnadu, India
Experience
3-5 years
Education
Bachelor's or Master's degree in Electronics or similar.
- Tools Skill-set:
-PnR tools: Cadence Innovous, Synopsis-ICC2
-Timing tools: Cadence Tempus, Synopsis-Primetime
-Power analysis tools: RedHawk power integrity
-Physical verification: Calibre (Siemens)/IC verification-ICV
- General Requirements :
-Excellent problem-solving and troubleshooting skills
-Strong written, verbal, and telephonic communication skills.
-Excellent research and interpersonal skills
-Strong analytical skills
Job Location:
-India, Tamilnadu, Coimbatore
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